Field of Invention
The invention relates to a method for semiconductor patterning and specifically to enhance corner residue removal and achieve a vertical profile target in etching of intersecting patterns.
Description of Related Art
The presence of non-volatile by-products or residue in intersecting patterns affects the performance of patterned devices. For example, the presence of silicon residue in a gate module after silicon gate etching can change technical characteristics of the device or result in failure of the device.
Selective etching of silicon requires the use of, for example, hydrogen bromide, HBr, plasmas. Other combination of gases may also be used. Reaction between Si, oxygen and Br can result in generation of large amounts of non-volatile by-product in the form of SiBrxOy. The SiBrxOy is also accumulated on the process chamber walls and desorbs to the gas phase and re-deposits on the substrate. This results in partial reduction of physical transparency for the reactive species. The reactive ion trajectories become limited especially in the substrate features below the mask level, thus etching cannot remove silicon by-product from the corners of intersections. In addition, it is difficult to control the corner profile where the patterns intersect; these typically do not have vertical profiles using current schemes.
The need for corner residue problem solution is very critical for the 10N technological node and beyond. In addition, there is a need for an integration scheme that enable the series of processes to produce a vertical corner profile. Furthermore, there is also a need for a process or series of processes that can perform the physical removal of non-volatile by-product from the substrate surface at the intersection corners. There is also a need for determining the appropriate ranges of operating variables of the integration process of patterning of one or more intersecting structures to achieve integration objectives.